FAST INSULATED GATE FIELD EFFECT TRANSISTOR CIRCUIT USING MULTIPLE THRESHOLD TECHNOLOGY

摘要

An integrated logic circuit using FETs having different threshold characteristics to assure that the FETs having the lower threshold voltage turn ON before those having a high threshold voltage when their gates are connected to a common node. Thus it is possible to use a low threshold FET diode as a series element in the discharge path between the logic output node of a conventional NOR circuit and its load. This diode isolates the conventional NOR from the interconnection capacitance, thus eliminating the effect of the interconnection capacitance on rising transitions at the logic output node. Furthermore, since low threshold devices can exist within the same circuit as the necessarily high threshold input FETs, two lower threshold FETs can be connected in series such that the input capacitance of a succeeding stage can be charged to a logic 1 voltage that is less than the power supply voltage by the gate to source voltage of the two lower threshold FETs. This logic 1 voltage is higher since the threshold of these two devices is lower than would be possible in single threshold technology. Also, the second of the two lower threshold FETs can serve as a charging means for the input capacitance of the succeeding stage while maintaining the isolation between that capacitance and the output of the conventional NOR circuit. Thus, multiple threshold technology can be used to reduce the effect of the interconnection capacitance of succeeding logic stages, while increasing the logic level.