Interface circuit for data processing system - has passive memory connected to address register and addressed by microinstructions from three zone word memory

摘要

The interface circuit is formed as a monolithic integrated circuit including a passive memory. An address register is connected to a selector circuit with two groups of inputs connected to the 'sequence address', and the 'coupling address' zones of the memory. The input of the selection circuit is connected to the output of a logic circuit. The three inputs of the logic circuit are connected to an 'internal/external test' zone of the memory to an 'external test' terminal of the interface circuit and to the output of a multiplexer controlling the internal tests.