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housing for a balance sheet halfgeleiderinrich ting.

机译:资产负债表的住房。

摘要

A semiconductor package for containing two individual devices such that they may be externally connected in a push-pull relationship. Two transistors, each having an input and output pad are formed on the same dielectric wafer, in a spaced relationship with each other and a ground plane so as to form two separate transmission line paths. The transistors are wired either in a grounded emitter or grounded base configuration. A shunt inductor is formed by a metallized strip or lead bond from the collector of one transistor to the collector of the other transistor. This inductor reduces the influence of the parasitic capacitance in the equivalent output circuit of the transistors. Since the collectors of both transistors are at the same DC level it is not necessary to include a DC blocking capacitor in series with the inductor. This increases the reliability and the reproducibility of the circuit because bonding wires necessary in prior devices to connect the blocking capacitor in series with the output inductance is not necessary. This packaging technique increases the output impedance, decreases the internal losses, and increases the bandwidth when wired as a push-pull circuit.
机译:一种半导体封装,用于容纳两个单独的器件,以便它们可以以推挽关系从外部连接。分别具有输入和输出焊盘的两个晶体管以彼此隔开的关系和接地平面形成在同一电介质晶片上,从而形成两个分开的传输线路径。晶体管以接地发射极或接地基极配置布线。通过从一个晶体管的集电极到另一个晶体管的集电极的金属化带或引线键合形成并联电感器。该电感器减小了晶体管等效输出电路中寄生电容的影响。由于两个晶体管的集电极处于相同的直流电平,因此不必包括与电感器串联的隔直电容器。这增加了电路的可靠性和可再现性,因为不需要在现有装置中将阻塞电容器与输出电感串联连接所需的键合线。当以推挽电路接线时,这种封装技术会增加输出阻抗,减少内部损耗并增加带宽。

著录项

  • 公开/公告号NL7800032A

    专利类型

  • 公开/公告日1978-07-11

    原文格式PDF

  • 申请/专利号NL19780000032

  • 发明设计人

    申请日1978-01-02

  • 分类号H01L49/02;H01L27/06;

  • 国家 NL

  • 入库时间 2022-08-22 22:46:09

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