Series to parallel code converter - includes input memory for each processing point while every busbar holds additional switch

摘要

The series to parallel code converter is applied for display control of TV monitors to ensure interruption-free presentation of signals on different monitors. The main memory operators with series of lines and columns with first clock switching for readout operation. The circuit ensures that during part of the clocking cycle the data are available at the output. The main memory includes RAM's connected to data processing units by lines C1....., the capacity of the memories determined by the volume of stored data of each TV monitor. The tristate gates T11....are connected to a busbar (B1, B2) feeding the inputs of AND gates T71.... while the outputs of the latter control the input memories ES11 where data are stored in the parallel form code. The input memories feed the intermediate memories ZS1 of video signal generators BE1.