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Bucket brigade circuits

机译:桶式旅团

摘要

The underlying concept of the invention disclosed is the use of charge partitioning for providing a precision weighted tap in a bucket brigade circuit. At the drain node of a charge conducting element in a bucket brigade device, the signal path is split in half with a first half going to the source of a first FET and the second half going to the source of a second FET. The first and second FET devices have their associated overlap capacitances, transconductances and threshold voltages matched by virtue of their close proximity to one another on the semiconductor substrate so as to have matched charge transfer characteristics. The amplitude of the charge stored on the capacitor at the node is therefore divided into two parts, with one portion being transferred by the first FET device and the remaining portion being transferred by the second FET device. This simple circuit accomplishes a precise charge division for the charge entered into the bucket brigade circuit. Successive cells in the bucket brigade device can have their drain nodes connected to matched pairs of first and second FET devices to successively divide the charge stored therein by one-half so that a sequence of decrements in the charge transferred along the bucket brigade chain may be made in multiples of one-half. By selectively gating the outputs of each of the respective tapped branches from the bucket brigade device at a summing node, values of from zero to unity in fractional unit intervals can be generated as an analog output. A digital to analog converter may be formed by inputting a serialized digital word into the input of the bucket brigade device whose successive cells have attached thereto respective pairs of FET charge partitioning devices. The outputs of all branches are summed so that a resultant charge, which is the sum of the charges output by the charge partitioning transistors, will appear at the output as the analog value for the binary serial word input to the bucket brigade device.
机译:公开的本发明的基本概念是电荷分配在桶式大队电路中用于提供精确加权抽头的用途。在桶式旅装置中的电荷传导元件的漏极节点处,信号路径被分成两半,其中前一半进入第一FET的源极,后一半进入第二FET的源极。第一和第二FET器件具有相关的重叠电容,跨导和阈值电压,这是由于它们在半导体衬底上彼此非常接近而匹配的,从而具有匹配的电荷转移特性。因此,在节点处存储在电容器上的电荷的幅度分为两部分,一部分由第一FET器件传输,其余部分由第二FET器件传输。这个简单的电路可对进入铲斗大队电路的电荷进行精确的电荷分配。桶式旅装置中的相继单元可使其漏极节点连接到匹配的第一和第二FET器件对,以将存储在其中的电荷相继分半,从而沿桶式旅链传输的电荷的递减顺序可以是:以二分之一的倍数制成。通过在求和节点处有选择地选通来自桶式大队装置的各个分接的分支的输出,可以生成分数单位间隔中从零到一的值作为模拟输出。可以通过将串行化的数字字输入到桶式旅装置的输入中来形成数模转换器,该桶式旅装置的连续单元已经附着有相应的成对的FET电荷分配装置。将所有支路的输出相加,以使所得电荷(即电荷分配晶体管输出的电荷之和)作为输入到桶式大队装置的二进制串行字的模拟值出现在输出上。

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