The drive circuit generates paired signal voltages at resistive voltage dividers supplied from a d.c. source and uses a switching circuit controlled by periodic control signals. Each pair of signals has its own pair of voltage dividers connected in parallel and supplied from the same d.c. source. The dividers' resistors are symmetric about a vertical reference voltage. Each voltage divider contains the same number of series resistors. Each resistor has the same value as its mirror image resistor in the other divider. The circuit is insensitive to load variation.
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