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procedures for the operation of a channel memory fet, a channel memory fet to perform the procedure and application of the system to the n channel memory fets a speichermatrix
procedures for the operation of a channel memory fet, a channel memory fet to perform the procedure and application of the system to the n channel memory fets a speichermatrix
'N' channel field effect transistor intended for use in telephone switching systems and data processing equipment, has a floating memory gate or grid isolated by some dielectric material and is negatively charged by the input program by electron injection. A second gate is charged positively with respect to the 'N' channel when reading out the memory state of the transistor, such that the drain-source circuit is conducting during its non-programmed state and conducting in its programmed state. The channel length is less than 10 microns, normally 1 to 3 microns and the substrate resistivity 3 to 10 ohms/cm.
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