System and method for modifying a transmission channel in order to eliminate of effective the dc voltage components in an even clock cycle ends transmission system for the sequential transmission of data bits binary in successive clocked bits - cells of a transmission channel

摘要

ABSTRACT OF THE DISCLOSUREA method and apparatus provide for the eliminationof any net DC component from the transmission of binary datasequentially in successive clocked bit cells of a transmissionchannel wherein logical first bit states, e.g., O's, arenormally transmitted as signal transitions relatively earlyin respective bit cells, preferably at cell edge, and logicalsecond bit states, e.g., l's, are normally transmitted assignal transitions relatively late in respective bit cells,preferably at mid-cell, and any transition relatively earlyin a bit cell following a transition relatively late in thenext preceding bit cell is suppressed. The onset of asequence of second bit states following a first bit statethat might introduce a DC component into the transmittedsignal with normal transmission is detected by counting firstbit states and producing a first indicating signal when the countis of parity indicating such sequence, and in response to thefirst indicating signal, a current bit and an adjacent bitthe transmission of signal transitions is modified from theonset of such sequence to eliminate any DC component.Preferably, the possibly troublesome sequences are encodedby encoding pairs of second bit states by a single transitionearly in the first bit cell of the pair.