System and method for modifying a transmission channel in order to eliminate of effective the dc voltage components in an even clock cycle ends transmission system for the sequential transmission of data bits binary in successive clocked bits - cells of a transmission channel

摘要

A method and apparatus provide for the elimination of any net DC component from the transmission of binary data sequentially in successive clocked bit cells of a transmission channel wherein logical first bit states, e.g., 0's, are normally transmitted as signal transitions relatively early in respective bit cells, preferably at cell edge, and logical second bit states, e.g., 1's, are normally transmitted as signal transitions relatively late in respective bit cells, preferably at mid- cell, and any transition relatively early in a bit cell following a transition relatively late in the next preceding bit cell is suppressed. The onset of a sequence of second bit states following a first bit state that might introduce a DC component into the transmitted signal with normal transmission is detected by counting first bit states and producing a first indicating signal when the count is of parity indicating such sequence, and in response to the first indicating signal, a current bit and an adjacent bit the transmission of signal transitions is modified from the onset of such sequence to eliminate any DC component. Preferably, the possibly troublesome sequences are encoded by encoding pairs of second bit states by a single transition early in the first bit cell of the pair.