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An input-output controller for data transfer entreun central computer and input-output unit

机译:用于数据传输实体中央计算机的输入输出控制器和输入输出单元

摘要

HIGH PERFORMANCE I/O CONTROLLER FOR TRANSFERRING DATA BETWEEN A HOST PROCESSOR AND MULTIPLE I/O UNITS An I/O controller for transferring data between a host processor and an I/O unit is disclosed comprising: a random access storage unit located in the I/O controller for storing data; first selectively operable data transfer circuitry for providing a data transfer path between the host processor and the controller storage unit; second selectively operable data transfer circuitry for providing a data transfer path between the controller storage unit and the I/O unit; first storage accessing circuitry for supplying addresses to the controller storage unit and selection signals to the second data transfer circuitry for enabling the transfer of data between the controller storage unit and the I/O unit; second storage accessing circuitry for supplying host processor main storage addresses to the host processor, controller storage addresses to the controller storage unit and selection signals to the first data transfer circuitry for enabling the transfer of data between the host processor main storage unit and the controller storage unit in a first data transfer mode; third storage accessing circuitry responsive to addresses received from the host processor for supplying addresses to the controller storage unit and selection signals to the first data transfer circuitry for enabling the transfer of data between the host processor and the controller storage unit in a second data transfer mode; and interleaving control circuitry for enabling the second mode data transfers to be interleaved with the first mode data transfers.
机译:用于在主机处理器和多个I / O单元之间传输数据的高性能I / O控制器公开了一种用于在主机处理器和I / O单元之间传输数据的I / O控制器,该I / O控制器包括:位于I中的随机访问存储单元/ O控制器,用于存储数据;第一可选择性操作的数据传输电路,用于在主机处理器和控制器存储单元之间提供数据传输路径;第二可选择性操作的数据传输电路,用于在控制器存储单元和I / O单元之间提供数据传输路径;第一存储访问电路,用于向控制器存储单元提供地址,并向第二数据传输电路提供选择信号,以使得能够在控制器存储单元和I / O单元之间传输数据;第二存储访问电路,用于向主机处理器提供主机处理器主存储地址,向控制器存储单元提供控制器存储地址,以及向第一数据传输电路提供选择信号,以实现主机处理器主存储单元和控制器存储之间的数据传输单元处于第一数据传输模式;第三存储器访问电路,其响应于从主机处理器接收的地址,用于将地址提供给控制器存储单元,并且将选择信号提供给第一数据传输电路,以使得能够在第二数据传输模式下在主机处理器和控制器存储单元之间进行数据传输;交错控制电路,用于使第二模式数据传输与第一模式数据传输交错。

著录项

  • 公开/公告号ES493787A0

    专利类型

  • 公开/公告日1981-04-01

    原文格式PDF

  • 申请/专利权人 INTERNATIONAL BUSINESS MACHINES CORPORATION;

    申请/专利号ES19800493787

  • 发明设计人

    申请日1980-07-29

  • 分类号G06F3/06;G06F11/34;

  • 国家 ES

  • 入库时间 2022-08-22 15:50:28

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