首页> 外国专利> Gate turn-off type thyristor - has base inlaid emitter zones for shorting base to emitters using FET gate drive

Gate turn-off type thyristor - has base inlaid emitter zones for shorting base to emitters using FET gate drive

机译:栅极关断型晶闸管-具有基极镶嵌发射极区,可使用FET栅极驱动器使基极与发射极短路

摘要

The anode (A)(5) is connected to a P layer (4) followed by an N layer (3) and the top base layer (2), P type, which contains the emitter zones (1a to 1d) to which the cathode electrodes (10 to 13)(K) are connected. The shorting electrodes (6 to 9), to the gate (G), are connected to the base layer (2) so that a complete outer circular structure (at F) with strips (6 to 9) interleave with the strip emitter zones (1a to 1d). The gate (G) is connected through an FET switch (14), which may be on the same integrated circuit chip, to the shorting electrodes (6 to 9) and the cathode (K). With a control potential (U1) on the gate (G) and the FET switch (14) closed, the emitter zones (1a to 1d) and the base (2) are short circuit so that the thyristor is blocked. The thyristor may be triggered by a pulse (P1) from a control circuit (Z1) connected to the centre shorting electrode (8). The separate pulse speeds up by the two way switching procedure, opposed to removing the potential from the electrodes by opening the gate (14).
机译:阳极(A)(5)连接到P层(4),然后连接N层(3)和P型顶部基础层(2),其中包含发射极区(1a至1d),阴极电极(10至13)(K)被连接。到栅极(G)的短路电极(6到9)连接到基础层(2),以便带(6到9)的完整外部圆形结构(在F处)与带发射极区( 1a至1d)。栅极(G)通过可以在同一集成电路芯片上的FET开关(14)连接到短路电极(6至9)和阴极(K)。在栅极(G)上的控制电位(U1)和FET开关(14)闭合的情况下,发射极区(1a至1d)和基极(2)短路,从而晶闸管被阻塞。可通过来自连接到中心短路电极(8)的控制电路(Z1)的脉冲(P1)来触发晶闸管。与通过打开栅极(14)消除电极上的电势相反,通过双向切换程序可加快独立脉冲的速度。

著录项

  • 公开/公告号DE2945391A1

    专利类型

  • 公开/公告日1981-05-21

    原文格式PDF

  • 申请/专利权人 SIEMENS AG;

    申请/专利号DE19792945391

  • 发明设计人 PATALONGHUBERTDR.-ING.;

    申请日1979-11-09

  • 分类号H01L29/74;

  • 国家 DE

  • 入库时间 2022-08-22 15:13:59

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