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Integrated injection logic circuit with reduced injection current - achieved by locally modifying near surface doping of lateral transistor base
Integrated injection logic circuit with reduced injection current - achieved by locally modifying near surface doping of lateral transistor base
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机译:降低注入电流的集成注入逻辑电路-通过局部修改横向晶体管基极的近表面掺杂实现
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摘要
In the case of an PNP type lateral transistor the near surface region (6) of the base is of type N plus and is formed at the same stage as the collectors (5) of the vertical NPN transistor. This modified region neither touches nor intersects the emitter or collect regions. This technique permits structures to be used which would not formerly work because of excessive injection current and linear components to be integrated on the same dice without degrading switching speed and chip density of significantly increasing cost.
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