首页> 外国专利> Transparent refresh controller for dynamic MOS memory cells - partitions memory bank into two parts one of which is refreshed while other is accessed with time slot reserved for normal refresh

Transparent refresh controller for dynamic MOS memory cells - partitions memory bank into two parts one of which is refreshed while other is accessed with time slot reserved for normal refresh

机译:用于动态MOS存储器单元的透明刷新控制器-将存储体分为两部分,其中一部分被刷新,而另一部分则通过保留用于常规刷新的时隙来访问

摘要

Each memory unit is portioned into two zones to performs read and write operations in the time transparent memory refresh takes place asynchronously in the other zone leading to a higher throughput. The transparent refresh is primed by the completion of a normal access cycle during a reserved refresh period and takes place during the neat two access cycles during which each zone is refreshed in turn. The second part of the period is reserved for normal memory refresh of the zone that is not refreshed if during the first part a single memory access had taken place after transport refresh was indicated. The second period also refreshes both zones if no memory accesses had been executed. Normal read and write accesses and refresh take place during alleted intervals but asynchronously w.r.t. each other.
机译:每个存储单元都分成两个区域,以在其他区域异步进行透明内存刷新时执行读取和写入操作,从而提高吞吐量。透明刷新是通过在保留的刷新周期内完成正常访问周期而引发的,并在整洁的两个访问周期内进行,在此周期内依次刷新每个区域。如果指示传输刷新后,在第一部分中进行了单个内存访问,则该时段的第二部分将保留给未刷新区域的常规内存刷新。如果未执行任何内存访问,则第二个周期还会刷新两个区域。正常的读写访问和刷新在指定的时间间隔内进行,但不同步。彼此。

著录项

  • 公开/公告号FR2480981A1

    专利类型

  • 公开/公告日1981-10-23

    原文格式PDF

  • 申请/专利权人 CII HONEYWELL BULL;

    申请/专利号FR19800009031

  • 发明设计人 PAUL MARIE GIRARD;

    申请日1980-04-22

  • 分类号G11C7/00;G11C11/40;

  • 国家 FR

  • 入库时间 2022-08-22 15:00:56

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