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Transparent refresh controller for dynamic MOS memory cells - partitions memory bank into two parts one of which is refreshed while other is accessed with time slot reserved for normal refresh
Transparent refresh controller for dynamic MOS memory cells - partitions memory bank into two parts one of which is refreshed while other is accessed with time slot reserved for normal refresh
Each memory unit is portioned into two zones to performs read and write operations in the time transparent memory refresh takes place asynchronously in the other zone leading to a higher throughput. The transparent refresh is primed by the completion of a normal access cycle during a reserved refresh period and takes place during the neat two access cycles during which each zone is refreshed in turn. The second part of the period is reserved for normal memory refresh of the zone that is not refreshed if during the first part a single memory access had taken place after transport refresh was indicated. The second period also refreshes both zones if no memory accesses had been executed. Normal read and write accesses and refresh take place during alleted intervals but asynchronously w.r.t. each other.
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