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device for the combination of a variety of import datenbitströmen in a single source bitstrom

机译:单一来源bitstrom中用于组合多种导入datenbitströmen的设备

摘要

A plurality of digital data streams are combined into a single bit stream by a multiplexer apparatus in which a first multiplexer circuit combines bits from odd-numbered channels into a frame interval which begins with a first type terminal control bit and has a second type terminal control bit midway in the frame. A second multiplexer circuit combines the bits from the even-numbered channels into a frame interval which begins with a complement of the first type terminal control bit and has the second type terminal control bit positioned at a location midway within the frame. The outputs of both multiplexer circuits are scrambled in order to improve the signal statistics and are interleaved in a simple gated OR circuit in order to provide a bit stream having a bit rate which is twice the rate at which either of the multiplexer circuits is operated. In response to a timing control circuit, the first type terminal control bit is positioned in a digit space adjacent to its complement and the two second type terminal control bits are positioned in adjacent digit spaces within the output bit stream. As a result, framing is achieved entirely by the terminal control bits with no assistance from framing bits, and the multiplex circuits operate at a rate equal to approximately one-half the output bit rate. The terminal control bits are utilized primarily to provide stuffing and parity information.
机译:多路复用器设备将多个数字数据流组合为一个比特流,其中第一多路复用器电路将奇数通道的比特组合为一个帧间隔,该帧间隔以第一种终端控制位开始,并具有第二种终端控制在画面中间。第二多路复用器电路将来自偶数信道的比特组合成帧间隔,该帧间隔以第一类型终端控制位的补码开始,并且具有第二类型终端控制位位于帧内的中间位置。对两个多路复用器电路的输出进行加扰以改善信号统计,并在简单的门“或”电路中对它们进行交织,以便提供比特率,该比特流的比特率是任何一个多路复用器电路的工作速率的两倍。响应于时序控制电路,第一类型终端控制位被放置在与其补码相邻的数字空间中,而两个第二类型终端控制位被放置在输出位流中的相邻数字空间中。结果,完全由终端控制位来完成成帧,而没有成帧位的帮助,并且多路复用电路以大约等于输出位速率的一半的速率工作。终端控制位主要用于提供填充和奇偶校验信息。

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