Method and device for reducing quantisation errors

摘要

The invention relates to a method and device for reducing quantisation errors. In a class D output stage digitally controlled at a clock frequency predetermined by the crystal (42), a pulse is generated with the aid of the memory (45), the multiplexer (43) and the counter (40) at the output of the OR gate (41), said pulse being forwarded with the aid of the D-multiplexer (44) to the transistors (T1 and T2) of the push-pull output stage which act as switches and operate in push-pull mode. A rough and fine definition of the final current value (i1) is carried out within an activation cycle (a) through double closure of the switches (T1 and T2) during the periods (b and d). The invention can be used in television or VDU equipment. IMAGE