Apparatus for multiplying a multiplicand by decimal decimal digits of a multiplier in successive treatment system decimal.

摘要

A data processor performs a decimal multiply operation using apparatus including a register for storing multiplier decimal digits, a register for storing a multiplicand operand of decimal digits, a register for storing partial products and arithmetic logic units, and a read only memory for storing the units and tens product digits. The multiplier digit and a selected multiplicand digit are applied to the address terminals of the read only memory. On successive cycles, the units product digit and the tens product digit are added respectively to selected partial product digits and the sum replaces the selected partial product digits.