Cycle sequence controller e.g. for waste water treatment - has multiple register memory, interface, test circuit, display time base circuit and register selector

摘要

The controller has a circuit which allows the introduction of data whilst a further circuit tests the operation. A coding and display circuit, a time base and a unit providing interface to an alarm output and input are provided. A sequence output interface and a register coding interface also form part of the controller. The controller is not specifically dedicated to one task, and is intended to be adaptable for a variety of applications. Since it uses only a memory and not a microprocessor the circuit is very simple. Each programme step, ordered by the sequencer, can have a duration of between 0 and 99 units. Each unit can correspond, according to the utilisation of the sequencer, from one to a fraction of a second; a multiple of a second, to a minute etc.