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Circuit for interference elimination in transmission systems for digital signals, particularly for the elimination of higher-frequency interference pulses of any polarity
Circuit for interference elimination in transmission systems for digital signals, particularly for the elimination of higher-frequency interference pulses of any polarity
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机译:用于消除数字信号传输系统中的干扰的电路,尤其是用于消除任何极性的高频干扰脉冲的电路
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摘要
1. A circuit arrangement for interference-clearing of transmission devices for digital signals, in particular for gating out higher-frequency interference pulses of arbitrary polarity, employing two monostable trigger circuits which produce a pulse of fixed width and constant polarity from each positive and negative flank of the input signal, characterized in that the pulses are linked with the aid of an OR-circuit (O) and that the output signal of the OR-circuit (O) is fed as a clock pulse signal to the clock pulse input (C) of a flip-flop (FF), whose other input is prepared by the input signal (E) in such a manner that the flip-flop (FF) is triggered by the trailing flank of the clock pulses into the respective other position only if the input Signal (E) at the preparation input of the flip-flop (FF) has changed at this time compared with the time before the clock pulse.
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