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High resolution fast diode clamped comparator
High resolution fast diode clamped comparator
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机译:高分辨率快速二极管钳位比较器
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摘要
An electronic comparator circuit (10) adapted for implementation as an integrated circuit semiconductor device provides high resolution and high speed performance. The circuit comprises a first differential amplifier (12) with clamping diodes (50, 52) that allow a fast response; a source- follower stage (14) connected to the first differential amplifier for buffering its output to enable it to be broadbanded; a second differential amplifier (16) driven by the source- follower stage for handling large signal swings while providing additional gain, a level shift stage (18) for driving the output stage in a class A-B mode, and a cascode output stage (20) which provides increased circuit gain and an output signal which ranges from the positive supply voltage (V.sub.DD) to the negative supply voltage (V.sub. SS).
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