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DETECTION SYSTEM FOR COMMON BUS TROUBLE

机译:常见总线故障检测系统

摘要

PURPOSE:To easily judges trouble contents originating from a common bus by monitoring the time from the generation of a request for the right to control the common bus to the reception of a transfer answer signal, and releasing a microcomputer from being in a state WAIT and performing interruption processing operation. CONSTITUTION:The microcomputer 10 enters the state WAIT after sending the request for the right to control the common bus to a bus master. A trouble diagnostic program that the microcomputer 10 uses in interrruption operation is stored in internal memory 23. The timer from the generation of the request for the right to control the common bus to the reception of the transfer answer signal is monitored by a timer circuit 17, and when this timer circuit 17 detects the monitored time being over, the microcomputer 10 is allowed to exit from the state WAIT and the interruption processing operation is performed.
机译:目的:通过监视从产生对公共总线的控制权的请求到接收到传输应答信号的时间,并使微型计算机从等待状态释放,来容易地判断源自公共总线的故障内容。执行中断处理操作。组成:微计算机10在向总线主机发送对公共总线的控制权的请求之后,进入等待状态。微型计算机10在中断操作中使用的故障诊断程序被存储在内部存储器23中。从产生对控制公共总线的权利的请求到接收到传输应答信号的定时器由定时器电路17监控。然后,当该定时器电路17检测到监视时间结束时,使微型计算机10从等待状态退出,进行中断处理。

著录项

  • 公开/公告号JPS60178554A

    专利类型

  • 公开/公告日1985-09-12

    原文格式PDF

  • 申请/专利权人 RICOH KK;

    申请/专利号JP19840033545

  • 发明设计人 ISHIKAWA YASUNORI;

    申请日1984-02-24

  • 分类号G06F11/30;G06F11/00;G06F11/267;G06F13/00;G06F13/42;

  • 国家 JP

  • 入库时间 2022-08-22 08:34:11

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