Method of displaying the logic status of several neighbouring modes in integrated circuits in a logic picture by using a pulsed-electron probe

摘要

A method for representing logic changes of state occurring at a plurality of adjacent circuit nodes in an integrated circuit in the form of a logic image employs a pulsed electron probe which always scans a same path in the x-direction on the integrated circuit and the phase of the electron pulses comprising the pulsed electron probe is continuously shifted for each new scanning operation. The integrated circuit can be imaged up to the edge of a recording or field of view limit and it is only at this limit that the y-deflection of the pulsed electron probe is fixed. Very small spacings, such as those occurring between adjacent integrated circuit tracks, can thus be reliably imaged on the picture screen of the scanning electron microscope.