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CCD Delay line system for translating an analog signal
CCD Delay line system for translating an analog signal
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机译:CCD延迟线系统,用于转换模拟信号
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摘要
The use of a return-to-zero (RZ) sample and hold circuit between the CCD delay line circuit and the low-pass filter of the analog signal translation system provides a steeper high-frequency roll-off of the output from the low-pass filter than does a non-return-to-zero (NRZ) sample and hold circuit, and, therefore, produces less attenuation of high-frequency components of analog signal, such as the color-carrier of an NTSC color television signal.
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