Circuit arrangement for overcurrent limiting in an invertor having power semiconductors, for example GTO thyristors, which can be turned off

摘要

In the case of an invertor, the series circuit of two GTO thyristors (T1, T2) with a circuitry inductor (LS) is located between the two DC voltage potentials of said invertor and the AC voltage connection is arranged in the connection of the two GTO thyristors (T1, T2). The series circuit of a circuitry capacitor (CS) with a first circuitry diode (DS1) is connected in parallel with the one GTO thyristor (T1). A device which absorbs the excess circuitry energy is connected in series with a storage capacitor (C0) between the DC voltage potentials of the invertor. In this case, the one pole of the storage capacitor (C0) is connected via a second circuitry diode (DS2) to the connection between the circuitry capacitor (CS) and the first circuitry diode (DS1). It is intended to prevent an overcurrent occurring in the event of erroneous, simultaneous triggering of the two GTO thyristors (T1, T2). For this purpose, the storage capacitor (C0) is decoupled from the DC voltage potential by a third circuitry diode (DS3) and a protective tuned circuit, consisting of a protection thyristor (TK1) which can be triggered immediately in the event of overcurrent, an inductor coil (LK2) and a precharged capacitor (CK), is connected in parallel with the invertor input. IMAGE