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Arithmetic logic system using the output of a first alu to control the operation of a second alu

机译:使用第一alu的输出来控制第二alu的运算的算术逻辑系统

摘要

An arithmetic logic system for performing a variety of arithmetic and logical functions on pixel input streams such as averaging down the input image stream, computation of absolute values, and signed or unsigned, clipped or unclipped, addition, subtraction and multiplication. The arithmetic logic system has a first arithmetic logic unit connected to a plurality of input signals. A second arithmetic logic unit is coupled to the first arithmetic logic unit and operates on the output of the first arithmetic logic unit. A control unit is coupled to the first and second arithmetic logic units and controls the operation of the second arithmetic logic unit based on the output of the first arithmetic logic unit.
机译:一种用于对像素输入流执行各种算术和逻辑功能的算术逻辑系统,例如对输入图像流进行平均,计算绝对值以及对有符号或无符号,限幅或限幅,加法,减法和乘法进行平均。算术逻辑系统具有连接到多个输入信号的第一算术逻辑单元。第二算术逻辑单元耦合到第一算术逻辑单元,并且对第一算术逻辑单元的输出进行操作。控制单元耦合到第一和第二算术逻辑单元,并基于第一算术逻辑单元的输出来控制第二算术逻辑单元的操作。

著录项

  • 公开/公告号US4754412A

    专利类型

  • 公开/公告日1988-06-28

    原文格式PDF

  • 申请/专利权人 SCHLUMBERGER SYSTEMS & SERVICES INC.;

    申请/专利号US19850785351

  • 发明设计人 MICHAEL F. DEERING;

    申请日1985-10-07

  • 分类号G06F7/38;

  • 国家 US

  • 入库时间 2022-08-22 06:48:55

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