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Design of Arithmetic and Logic Unit (ALU) Using Subthreshold Adiabatic Logic for Low-Power Application

机译:亚阈值绝热逻辑在低功耗应用中的算术和逻辑单元(ALU)设计

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As density and size of VLSI chips still increase, the power consumption has become an important concern. The CMOS circuit with nominal supply voltage operating in high frequency consumes more power. The fashionable applications like mobile systems, sensing element networks need low power consumptions. In subthreshold logic, the circuit operates with voltage which is below transistor threshold voltage and it utilizes the subthreshold current as operating current. Adiabatic logic can even enforce in subthreshold regime to cut back dynamic power consumption considerably. ALU is one in all basic block within the low-cost electronic equipment. It consumes heap of power by continuous computation. So, it's important to cut back power consumption for higher performance. During this work, Arithmetic and Logic Unit is designed by subthreshold adiabatic logic and standard CMOS logic. The performance of ALU designed by subthreshold adiabatic logic is compared with standard CMOS logic. In order to simulate the circuits, Cadence virtuoso environment is used for 180 nm technology.
机译:由于VLSI芯片的密度和尺寸仍在增加,功耗已成为一个重要的问题。具有在高频下工作的标称电源电压的CMOS电路会消耗更多功率。诸如移动系统,传感元件网络之类的流行应用需要低功耗。在亚阈值逻辑中,电路以低于晶体管阈值电压的电压工作,并且利用亚阈值电流作为工作电流。绝热逻辑甚至可以在亚阈值范围内强制执行,以大幅降低动态功耗。 ALU是低成本电子设备中所有基本模块之一。它通过连续计算消耗大量的功率。因此,重要的是减少功耗以实现更高的性能。在这项工作中,算术和逻辑单元是由亚阈值绝热逻辑和标准CMOS逻辑设计的。将亚阈值绝热逻辑设计的ALU的性能与标准CMOS逻辑进行了比较。为了模拟电路,Cadence virtuoso环境用于180 nm技术。

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