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SOFTWARE INSTRUCTION ENDOWING APPARATUS METHOD FOR MICROPROGRAMMING SYSTEM

机译:微程序设计系统的软件指令赋权方法

摘要

PURPOSE: To improve the throughput of a system by increasing or decreasing a virtual address stored in a base register during the read cycle of the preceding operand for the address designation of the next operand. CONSTITUTION: A virtual memory managing unit(VMMU) 34 translates the virtual address described in an instruction to be executed into physical address of a main storage device 50. This physical address is sent out to the main storage device 50 and a cache memory 36. A binary arithmetic logic unit(BALU) 4 receives the operand, increases or decreases the base address or an index value and stores this increased or decreased address or index value in a register file 2. A Q register 6 and a shifter 8 are operated together with the BALU 4 and perform various kinds of arithemtic operation and logical operation including binary multiplication and division under the control of RDR signal.
机译:目的:通过在前一个操作数的读取周期内增加或减少存储在基址寄存器中的虚拟地址,以提高系统的吞吐量,以指定下一个操作数。组成:虚拟内存管理单元(VMMU)34将要执行的指令中描述的虚拟地址转换为主存储设备50的物理地址。该物理地址被发送到主存储设备50和高速缓存36。二进制算术逻辑单元(BALU)4接收操作数,增加或减少基地址或索引值,并将此增加或减少的地址或索引值存储在寄存器文件2中。AQ寄存器6和移位器8与BALU 4并在RDR信号的控制下执行各种算术运算和逻辑运算,包括二进制乘法和除法。

著录项

  • 公开/公告号JPS647145A

    专利类型

  • 公开/公告日1989-01-11

    原文格式PDF

  • 申请/专利权人 HONEYWELL BULL INC;

    申请/专利号JP19880121665

  • 申请日1988-05-18

  • 分类号G06F9/22;G06F9/30;G06F9/34;G06F9/38;G06F11/14;G06F12/10;

  • 国家 JP

  • 入库时间 2022-08-22 06:41:05

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