GEINTEGREERDE LOGISCHE SCHAKELING MET 'HOT-CARRIER-STRESS'-REDUKTIE EN INSTABILITEITEN-DEMPING.

摘要

It is known to include at least one additional transistor (T) in cascode connection with at least one component in integrated logic circuits in order to avoid detrimentally high electrical fields in components of such circuits. The control electrode is then connected to one of the power supply lines (VDD). When the state of the logic circuit changes, switching currents generate voltage peaks on the power supply lines due to the inductance of these lines. Via the chip capacitance these voltage peaks jump from one power supply line to the other. Thus, a positive feedback loop is formed which comprises one power supply line, the chip capacitance, the other power supply line and the additional transistor. Instabilities are damped by inserting a resistance element (TR) between the control electrode of the additional transistor (T) and the power supply line (VDD) coupled thereto.