ABSTRACTA digital system bus arbiter network which providesprioritized but equal opportunity for various devices togain access to a common bus. The network samples the stateof all pending requests for bus access stores the currentrequests and generates a sequence of bus access grantingsignals in an order determined by the priority of the storedbus requests. When all of the bus requests have been processedfor a given sample period, the network resamples currentlypending bus requests and repeats the process of generatingthe sequence of bus granting signals on a prioritized basis.The network guarantees an equal share of bus bandwidth toeach device.
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