首页>
外国专利>
Detection circuit arrangement for faulty levels of digital signals injected in a bus
Detection circuit arrangement for faulty levels of digital signals injected in a bus
展开▼
机译:用于检测总线中注入的数字信号电平错误的检测电路装置
展开▼
页面导航
摘要
著录项
相似文献
摘要
The invention relates to a circuit arrangement for the detection of faulty levels of digital signals which are injected by at least one driver component, which is activated by data signals, into a bus line (15), wherein a decoupling unit is inserted between the relevant driver component and the bus line (15). For immediate detection of a functional fault in a driver component (13) and for identification of the latter, the output signal (A1) of each driver component (12, 52, 72) is combined in an exclusive-OR operation with the data signal (D1) to form an auxiliary signal (H), which is combined in an AND-operation with a release signal (E1) to form a fault signal (F1), which indicates a faulty level. IMAGE
展开▼