System and method to increase the data throughput performance in a pipeline microprocessor

摘要

The microprocessor according to the invention includes a cache memory, to store the target addresses of the branch commands and correspondingly branched commands. In the pipelining method of processing commands, when the branch command is decoded, a pre-access to the cache memory is made to call a branched command, so that, if the branch condition is fulfilled, the branched commands which are read first from the cache memory can be executed immediately, so that an enhanced data throughput performance is achieved. IMAGE