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Method for Improving Performance of a Pipelined Microprocessor by Utilizing Pipeline Virtual Registers
Method for Improving Performance of a Pipelined Microprocessor by Utilizing Pipeline Virtual Registers
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机译:利用流水线虚拟寄存器提高流水线微处理器性能的方法
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摘要
A method for improving performance of a pipelined microprocessor by utilizing pipeline virtual registers allows for either decreased register spillage or decreased area and power consumption of a microprocessor. The microprocessor takes advantage of register bypass logic to write short-lived values to virtual registers, which are discarded instead of being written to the register bank, thus reducing register pressure by avoiding short-lived values being written to the register bank.
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