TEST CIRCUIT FOR LEADING '1' DETECTING CIRCUIT

摘要

PURPOSE:To shorten the test time by providing a leading '1' detecting circuit with the test mode. CONSTITUTION:When a test mode signal 121 of the leading '1' detecting circuit rises, a rise detecting circuit 123 is set to '1' for a certain time, and a P-channel transistor TR 124 is turned on the set '1' to a register 101 of the most significant bit. Then, the output of a NOR gate 113 goes to the high level, and a TR 125 is turned on, and a shift bus 130 goes to the low level. The other N- channel TRs 126-129 connected to the shift bus are turned off because outputs of NOR gates 114-116 are in the low level. Therefore, an AND gate 117 outputs the high level, and the other AND gates 118-120 output the low level, and the value of the register 101 is shifted to a register 102. Leading '1' is successively shifted in this manner; and when leading '1' is set to a register 104 of the least significant bit, the output of the AND gate 120 goes to the high level and a flag 139 is set.