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MULTIPLE INTEGRATION TYPE A/D CONVERTER

机译:多重积分型A / D转换器

摘要

PURPOSE:To eliminate a digitizing error caused by an error of switching time of an integration current by applying high speed integration and low speed integration intermittently to switch the integration when no transient phenomenon takes place, counting the number of times of discharging in digitizing process. CONSTITUTION:A timing generating circuit 47 generates a sampling pulses PS with a pulse width t1 for a prescribed period to control a sampling switch SW1 of an integration circuit 1 to be turned on for a period t1. Thus, the electric charge stored in a capacitor CX is discharged in the unit of comparatively large electric charge and stepwise integration is applied. The number of times of the unit discharge is counted by a counter 51 in this case to decide a high- order m-bit in the digitizing process. The integration is executed in the unit discharge and the number of times of unit discharge is counted to digitize the analog input signal, then the integration time is not affected at all.
机译:目的:通过在无瞬态现象发生时间歇性地应用高速积分和低速积分来切换积分,消除由积分电流的切换时间误差引起的数字化误差,计算数字化过程中的放电次数。组成:一个定时产生电路47产生一个脉冲宽度为t1的采样脉冲PS,持续规定的时间,以控制积分电路1的采样开关SW1在时间段t1导通。因此,存储在电容器CX中的电荷以相对大的电荷为单位被放电,并且进行逐步积分。在这种情况下,通过计数器51对单位放电的次数进行计数,以确定数字化处理中的高阶m位。在单位放电中执行积分,并计算单位放电的次数以数字化模拟输入信号,因此积分时间完全不受影响。

著录项

  • 公开/公告号JPH02246622A

    专利类型

  • 公开/公告日1990-10-02

    原文格式PDF

  • 申请/专利权人 SONY CORP;

    申请/专利号JP19890068593

  • 发明设计人 SASAKI TADAO;

    申请日1989-03-20

  • 分类号H03M1/52;

  • 国家 JP

  • 入库时间 2022-08-22 06:22:55

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