PURPOSE:To inexpensively prevent system down without complicating equipment constitution by connecting a standby memory to a processor when a memory parity error occurs. CONSTITUTION:When a memory parity error detection circuit 9 detects that the memory parity error has occurred in a main memory 3, a switching command is given to a data selector 7 from the memory parity error detection circuit 9 through a signal line 21, and a data selector 7 connects the standby memory 5 to CPU 11. The memory parity error detection circuit 9 notices CPU 11 that the parity error has occurred and a system is switched to the standby memory 5. Thus, the system is automatically reset even if the memory parity error exists,and a system down prevention device can inexpensively be obtained with simple constitution.
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