首页> 外国专利> METHOD OF FORMING POLYCRYSTALLINE SILICON EMITTER AND POLYCRYSTALLINE SILICON GATE BY USING SAME ETCHING OF POLYCRYSTALLINE SILICON ON THIN GATE OXIDE FILM

METHOD OF FORMING POLYCRYSTALLINE SILICON EMITTER AND POLYCRYSTALLINE SILICON GATE BY USING SAME ETCHING OF POLYCRYSTALLINE SILICON ON THIN GATE OXIDE FILM

机译:通过在薄氧化膜上刻蚀多晶硅形成多晶硅发射体和多晶硅栅的方法

摘要

PURPOSE: To simultaneously form an emitter and a gate by forming a gate oxide layer and a polysilicon layer, removing them from an emitter region, adhering the polysilicon layer and masking and etching the emitter/gate regions. CONSTITUTION: A thin layer 70 of silicon dioxide is formed on the exposed surface of the silicon substrate 4, a thin polycrystalline silicon layer 72 is deposited and the remaining part of a photoresist layer 76 is set to be a mask. The exposed part of the polycrystalline silicon layer 72 is removed by etching and the exposed part of the oxide layer 70 is removed by etching with the photoresist layer 76 as the mask. Then, the polysilicon layer 74 is deposited on the remaining part of the polycrystalline silicon layer 72 and the exposed area of the silicon substrate 4. A photoresist layer 96 is deposited on the polysilicon layer 74 and all the areas of the polysilicon layer 74 are exposed excluding a region 100 forming the emitter of the bipolar device, a region 104 forming the gate of the NMOS device and a region 106 forming the gate on a PMOS device. Then, etching is executed until the exposed part is removed.
机译:目的:通过形成栅极氧化物层和多晶硅层,从发射极区域中去除它们,粘附多晶硅层并掩蔽和蚀刻发射极/栅极区域,同时形成发射极和栅极。构成:二氧化硅薄层70形成在硅衬底4的暴露表面上,沉积多晶硅薄层72,并且将光致抗蚀剂层76的其余部分设置为掩模。多晶硅层72的暴露部分通过蚀刻去除,并且氧化物层70的暴露部分通过以光致抗蚀剂层76作为掩模的蚀刻去除。然后,在多晶硅层72的剩余部分和硅衬底4的暴露区域上沉积多晶硅层74。在多晶硅层74上沉积光致抗蚀剂层96,并且暴露多晶硅层74的所有区域。除了形成双极型器件的发射极的区域100,形成NMOS器件的栅极的区域104和形成PMOS器件上的栅极的区域106之外。然后,执行蚀刻直到去除暴露的部分。

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