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Arrangement for measuring a quiescent current of an integrated monolithic digital circuit, integrated monolithic digital circuit provided with such an arrangement and testing apparatus provided with such an arrangement
Arrangement for measuring a quiescent current of an integrated monolithic digital circuit, integrated monolithic digital circuit provided with such an arrangement and testing apparatus provided with such an arrangement
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机译:用于测量集成单片数字电路的静态电流的装置,具有该装置的集成单片数字电路和具有该装置的测试装置
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摘要
An arrangement is proposed for measuring a quiescent current of a digital IC. The arrangement comprises a current sensor in series with the IC and the supply, voltage stabilization means for stabilizing the voltage across the IC and signal processing means coupled thereto for processing the measured quiescent current. The quiescent current is measured when no flip-flops are switched in the IC. By means of the arrangement, there can be measured rapidly and accurately whether the quiescent current assumes an abnormal value, which indicates that the IC exhibits defects. The signal processing means comprise a current mirror, which is coupled to a current comparator circuit supplying a digital output signal for determining a defect.
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