DEVICE FOR SIMULATION OF COMPUTER FAILURES AND MALFUNCTIONS

摘要

the invention u043eu0442u043du043eu0441u0438u0442u0441u00a0 to computer technology and is u0434u043bu00a0 simulating malfunctions in a pilot study of the reliability and stability of u0444u0443u043du043au0446 u0438u043eu043du0438u0440u043eu0432u0430u043du0438u00a0 structural surplus computing systems built using various asynchronous trunk interfaces.the purpose of u0438u0437u043eu0431u0440u0435u0442u0435u043du0438u00a0 - increase the functionalities of the device by simulating faults in cycles "address" and "data" line of computer. the device 1 includes the blocks u043fu0430u043cu00a0u0442u0438 16,17, encoder registers 18, 19 to 22, leading u0444u043eu0440u043cu0438u0440u043eu0432u0430u0442u0435u043bu0435u0439 blocks 23 to 29, a decoder 30, the address clock generator 31, 32, m u0443u043bu044cu0442u0438u043fu043bu0435u043au0441u043eu0440 33, r + s - triggers 34 - 36, 37 u0444u043eu0440u043cu0438u0440u043eu0432u0430u0442u0435u043bu044c impulses.the device 1 based on distortion information (address, data) in the transfer of its interfaces in the researched system (computer). the application of the proposed device in a pilot study of the reliability of u043fu043eu0437u0432u043eu043bu00a0u0435u0442 significantly shortened the time of the assessment of the reliability of u0440u0435u0437u0435u0440u0432u0438 systems and enhance the reliability of data. 3).