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Process for PECVD of silicon oxide using TEOS decomposition

机译:用TEOS分解法进行氧化硅PECVD的方法

摘要

A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma- enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.
机译:公开了一种高压,高通量,单晶片的半导体处理反应器,其能够单独地或作为一部分地进行热CVD,等离子体增强CVD,等离子体辅助回蚀,等离子体自清洁以及通过溅射的沉积形貌改变。原位多步处理。反应器包括相互交错的基座和晶片支撑指状件的协作阵列,这些阵列共同从机械手传输刀片上取下晶片,并以可变的,受控的,接近的平行间距将晶片和腔室进气歧管放置在晶片上,然后将晶片返回到刀。组合式RF /气体馈通装置可防止工艺气体泄漏,并将RF能量施加到进气歧管,而不会发生内部故障或气体沉积。进气歧管适于在晶片上提供均匀的气流。温度控制的内部和外部歧管表面可抑制冷凝,过早反应以及分解和沉积在外部表面上。该反应器还集成了均匀的径向泵送气体系统,该系统可使反应气体均匀地流过整个晶圆,并将吹扫气体向下和向上引导至晶圆的外围,以将废气径向地从晶圆上清除,以防止沉积在晶圆外并保持房间干净。该反应器可在很大的压力范围(包括非常高的压力)下提供均匀的处理。还公开了用于形成二氧化硅的高度保形层的低温CVD工艺。该工艺使用很高的反应室压力和低温,以及TEOS和臭氧反应物。低温CVD二氧化硅沉积步骤可单独或与后续各向同性蚀刻一起用于平坦化下面的阶梯式介电层。用于形成平坦化的二氧化硅层的优选的原位多步骤工艺使用(1)在低温和高压下的高速率二氧化硅沉积,然后(2)也在高压下沉积保形二氧化硅层,以及低温,然后(3)进行高速率各向同性蚀刻,最好是在用于两个氧化物沉积步骤的同一反应器中在低温和高压下进行。公开了针对不同应用的步骤的各种组合,以及优选的反应器自清洁步骤。

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