首页> 外国专利> PHASE-LOCKED LOOP COEFFICIENT GENERATOR FOR A FILTER ARRANGEMENT HAVING A NON-RATIONAL RATIO BETWEEN INPUT AND OUTPUT SAMPLING FREQUENCIES

PHASE-LOCKED LOOP COEFFICIENT GENERATOR FOR A FILTER ARRANGEMENT HAVING A NON-RATIONAL RATIO BETWEEN INPUT AND OUTPUT SAMPLING FREQUENCIES

机译:在输入和输出采样频率之间具有非合理比例的滤波器布置的锁相环系数发生器

摘要

G.ABSTRACTPhase-locked loop coefficient generator for a filter arrange-ment having a non-rational ratio between input and outputsampling frequencies.In a sample rate converter having a non-rationalconversion factor the input samples coincide with low-rateclock pulses and the output samples coincide with high-rateclock pulses, or inversely. It comprises a filter coeffi-cient generator 3 which, based on the distance (deviation)between a low-rate clock pulse and the immediately precedingor immediately subsequent high-rate clock pulse, con-tinuously supplies a series of filter coefficients. To de-termine the deviation a phase-locked loop (30) is provided,with a phase detector (301) receiving the low-rate clockpulses as well as synthetic low-rate clock pulses andsupplying a discrete-time phase difference signal u(.) whichis applied to a processor circuit (302). This circuit suppliesthe desired deviation d(.) and a reference number N which isapplied to a counter circuit (304), This circuit also re-ceives the high-rate clock pulses and each time after re-ceiving the number of clock pulses corresponding to thereference number it supplies a synthetic low-rate clockpulse. In the processor circuit 302 a filtering operation(3021) is first performed on the discrete-time phase dif-ference signal u(.) so that control signal samples H(.) areobtained. An auxiliary sample s(.) is subtracted from such acontrol signal sample and the difference is divided by aweighting factor incr. of the number P thus obtained thosebits whose significance is less than 2° represent thedeviation d(.), while the other bits represent the referencenumber N. By subsequently multiplying the deviation d(.) bythe weighting factor incr, a new auxiliary sample s(. + 1) isobtained (Fig. 1).
机译:G.摘要用于滤波器的锁相环系数发生器-输入与输出之间的比率不合理采样频率。在具有非理性的采样率转换器中输入采样的转换因子与低速率一致时钟脉冲和输出采样与高速率一致时钟脉冲或相反。它包含一个过滤器系数发电机3,它基于距离(偏差)在低速率时钟脉冲和紧接的前一个脉冲之间或紧随其后的高速率时钟脉冲,连续提供一系列滤波器系数。取消确定偏差并提供锁相环(30),相位检测器(301)接收低速时钟脉冲以及合成低速时钟脉冲和提供离散时间相位差信号u(。)处理器电路302被应用于处理器电路(302)。该电路电源期望偏差d(。)和参考数字N应用于计数器电路(304),该电路也会接收高速率时钟脉冲,并且每次重新接收接收对应于时钟脉冲的时钟脉冲数参考数字,提供合成低速时钟脉冲。在处理器电路302中,滤波操作(3021)首先在离散时间相位差-参考信号u(。),以便控制信号样本H(。)为获得。辅助样本s(。)从控制信号样本,其差除以加权因子从而获得小于2°的位表示偏差d(。),而其他位代表参考N.通过随后将偏差d(。)乘以加权因子incr,一个新的辅助样本s(。+ 1)为获得(图1)。

著录项

  • 公开/公告号CA1280159C

    专利类型

  • 公开/公告日1991-02-12

    原文格式PDF

  • 申请/专利权人 STIKVOORT EDUARD F.;

    申请/专利号CA19860525093

  • 发明设计人 STIKVOORT EDUARD F.;

    申请日1986-12-11

  • 分类号H03H17/06;

  • 国家 CA

  • 入库时间 2022-08-22 05:56:05

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