Circuit device for correction of double errors and detection of triple errors

摘要

A circuit device is disclosed for correction of double errors and detection of triple errors not based on external and large memories, working according to an algorithm and so realizable as an IC.;The circuit device (1) is devided into a transmitting block (2) having two separate coding sections (6, 8) connected in series, one (6) for double error correction and one (8) for triple-error detection, a receiving block (3) having two corresponding decoding sections (14, 15; 16) and testing means (5, 10, 11), selectionable and programable from outside devices, for testing the whole circuit device during both operation and non-operation conditions.