BINARY CODED DECIMAL TO BINARY TRANSLATOR

摘要

the invention u043eu0442u043du043eu0441u0438u0442u0441u00a0 to computer technology and can be used u0434u043bu00a0 rapid u043fu0440u0435u043eu0431u0440u0430u0437u043eu0432u0430u043du0438u00a0 u0434u0435u0441u00a0u0442u0438u0447u043du044bu0445 numbers in binary. purpose u0438u0437u043eu0431u0440u0435u0442u0435u043du0438u00a0 u00a0u0432u043bu00a0u0435u0442u0441u00a0 increased u0431u044bu0441u0442u0440u043eu0434u0435u0439u0441u0442u0432u0438u00a0.the u0434u043eu0441u0442u0438u0433u0430u0435u0442u0441u00a0 u043fu043eu0441u0442u0430u0432u043bu0435u043du043du0430u00a0 so that u043fu0440u0435u043eu0431u0440u0430u0437u043eu0432u0430u0442u0435u043bu0435 containing input register 1, 2 u043fu0430u043cu00a0u0442u0438 blocks, the first and second blocks 3, 5 u0441u0443u043cu043cu0438u0440u043eu0432u0430u043du0438u00a0 and interim regis tr 4, targeted building blocks u043fu0430u043cu00a0u0442u0438 connected to outputs k senior u0442u0435u0442u0440u0430u0434 subgroups u0442u0435u0442u0440u0430u0434 register 1 and outputs connected to the inputs of the block 5 u0441u0443u043cu043cu0438u0440u043eu0432u0430u043du0438u00a0 3 u0441u0443u043cu043cu0438u0440u043e u0432u0430u043du0438u00a0 that provides a multiplication on the 10K. 2). 2, table 2).