首页> 外国专利> Negative-voltage-limiting protection circuit for semiconductor chip - performs rapid clamping of input voltage at transistor saturation value without restricting range of circuit protected

Negative-voltage-limiting protection circuit for semiconductor chip - performs rapid clamping of input voltage at transistor saturation value without restricting range of circuit protected

机译:半导体芯片的负电压限制保护电路-在晶体管饱和值范围内快速钳位输入电压,而不会限制受保护电路的范围

摘要

Between the positive and negative DC supply connections (a,b) a protective circuit is constituted by eight inversely driven n-p-n transistors (T4-T11), a resistance (R1) and two p-n-p current sources (Q1,Q2). Interference at the input connection (c) which goes below the negative supply voltage diverts the current (12) from one source (Q2), cutting-off one transistor (T7). Current (I1) from the other source (Q1) flows to the base of another transistor (T5) whose emitter current reverse-drives the input transistor (T11) and clamps the input connection (c). ADVANTAGE - Disturbing voltages are held significantly below breakdown voltage of substrate diode at input connection.
机译:在正负直流电源连接(a,b)之间,保护电路由八个反向驱动的n-p-n晶体管(T4-T11),一个电阻(R1)和两个p-n-p电流源(Q1,Q2)组成。低于负电源电压的输入连接(c)上的干扰会使来自一个电源(Q2)的电流(12)转移,从而切断一个晶体管(T7)。来自另一个源极(Q1)的电流(I1)流向另一个晶体管(T5)的基极,该晶体管的发射极电流反向驱动输入晶体管(T11)并钳位输入连接(c)。优势-干扰电压保持在输入连接处的衬底二极管击穿电压以下。

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