Quasi-analogue individual parallel control of electrical loads - is programmed for clocking of recirculating shift register memory by microprocessor with min. output signal redundancy

摘要

The microprocessor (1) has digital and analogue-to-digital input ports (2, 3) for sensor and control signals (15, 14), and two PWM output lines (9.5,9.6) to switching power stages (10.5,10.6) for quasi-analogue loads. A digital output port (5) supplies a shift clock signal to a memory module (30) which can be loaded during a control pulse from another output port (6). Other power stages (10.1-10.4) are controlled from the memory (8.1-8.4) whose content is circulated in accordance with the clock pulse. USE/ADVANTAGE - In transport vehicle, e.g. big utlity vehicle for electrically controlled braking system. Multichannel clocking control can be extended to any number of loads from conventional microprocessor.