Double tuner type radio receiver - has two oscillators selectively coupled to phase detector, filter, smoothing circuit and divider to form two PLL-circuits

摘要

A programmable frequency divider (14) is alternatively fed with one of two superimposition signals output from two receive oscillators (4,11). A phase difference detector (15) produces a d.c. output dependent on the phase difference between a divider output, and a standard signal. A low-pass filter (17) removes a wave varying component from the detector output, and feeds a fitlered or smoothed d.c. component alternatively to the first or second oscillator (4,11). Two PLL(s) may each comprise the detectors, the low pass filter and one of the two oscillatorse, and a control circuit (18) may control their tuning. USE - RDS receiver.