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Method and apparatus for matching turn-off times of parallel connected semiconductor switching devices
Method and apparatus for matching turn-off times of parallel connected semiconductor switching devices
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机译:用于匹配并联的半导体开关器件的关断时间的方法和装置
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摘要
A power switching system for controlling the conductivity of a plurality of thyristors of the gate turn-off type (GTOs) which are connected in parallel between two power sources by gradually introducing a time compensation to force the times of turn-off of each of the thyristors toward matched values by determining the turn-off time during each conduction cycle and thereafter advancing or retarding the turn-off signal for the following conduction cycle to correct for the difference in turn-off times. A difference signal is generated between time of turn- off of an average current of the thyristors and the time of turn-off of an individual current in one of the thyristors from which a time advance or delay signal is added to the thyristor turn-off signal in response to the current flowing in a capacitor type integrator. This allows the turn- off times to reach a perfect match during periods in which the current is the same for several cycles.
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