CIRCUIT ARRANGEMENT FOR INDICATING LOCK OF THE PHASE LOCKED LOOPS USING PHASE DETECTOR REGULATING IN A BROAD RANGE OF THE PHASE ERROR

• 1. 相位频率检测电路、电荷泵相位频率检测器及锁相环电路 [P] . 中国专利： CN109743058A . 2019-05-10
• 2. 用于分数分频器的相位误差消除电路和方法和含有该相位误差消除电路的电路 [P] . 中国专利： CN1643794A . 2005-07-20
• 3. CIRCUIT ARRANGEMENT FOR THE LOCK INDICATION OF PHASED LOCKED LOOPS APPLYING PHASE DETECTOR REGULATING IN A BROAD PHASE ERROR RANGE [P] . HUT51052A . 1990-03-28

  机译： 在相差较大的误差范围内应用相检测器调节的相锁环的锁指示电路安排

• 4. Phase locked loop input signal monitoring circuit - prevents phase errors caused by phase jumps or frequency shifts using phase detector and filter [P] . 德国专利： DE2735011C2 . 1978-11-02

  机译： 锁相环输入信号监视电路-使用鉴相器和滤波器防止由相位跳变或频率偏移引起的相位误差

• 5. Phase locked loop input signal monitoring circuit - prevents phase errors caused by phase jumps or frequency shifts using phase detector and filter [P] . 德国专利： DE2735011B1 . 1978-03-16

  机译： 锁相环输入信号监视电路-使用鉴相器和滤波器防止由相位跳变或频率偏移引起的相位误差

• 1. Joint MAP channel estimation and data detection for OFDM in presence of phase noise from free running and phase locked loop oscillator [J] . Kamayani Shrivastav, R.P.Yadav, K.C.Jain 数字通信与网络（英文） . 2021,第001期
• 2. Low phase noise millimeter wave monolithic integrated phase locked-loop [J] . Tang Lu, Wang Zhigong, Qiu Yinghua, 高技术通讯（英文版） . 2012,第003期
• 3. Computing the Pull-In Range of Second-Order Phase Locked Loops with Tanlock and Sawtooth Phase Detectors [C] . Bassam Harb WSEAS International Conference on Circuits, Systems, Electronics, Control and Signal Processing . 2013
• 4. CMOS auto-ranging phase -locked loop integrated circuits for frequency synthesizers and clock recovery circuits [D] . Chang, Yi-Cheng 2000
• 5. Quantitative comparison of wideband low-latency phase-locked loop circuit designs for high-speed frequency modulation atomic force microscopy [O] . Kazuki Miyata, Takeshi Fukuma 2018
• 6. A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector [O] . Zunsong Yang, Yong Chen, Shiheng Yang, 2020
• 7. Steady-state phase error for a phase-locked loop subjected to periodic Doppler inputs [R] . Chen, C.-C., Win, M. Z. 1991

• 1. Joint MAP channel estimation and data detection for OFDM in presence of phase noise from free running and phase locked loop oscillator [J] . Kamayani Shrivastav ,R.P.Yadav ,K.C.Jain . 数字化用户：数字通讯 . 2021,第001期
• 2. A Digital Phase Locked Loop Speed Control of Three Phase Induction Motor Drive: Performances Analysis [J] . Ben Hamed Mouna ,Sbita Lassaad . 能源与动力工程（英文） . 2011,第1期
• 3. TOPOLOGICAL STRUCTURE OF THE SINGULAR POINTS OF THE THIRD ORDER PHASE LOCKED LOOP EQUATIONS WITH THE CHARACTER OF DETECTED PHASE BEING g(φ)=(1+k)sinφ/(1+kcosφ) [J] . 金均 . 应用数学和力学：英文版 . 1992,第9期
• 4. 面向锁相环的MEMS微波相位检测器的研究 [A] . 韩居正 . 2017