AN IMPROVED PROGRAMMABLE LOGIC ARRAY DEVICE USING CMOS EPROM FLOATING GATE TECHNOLOGY

摘要

logical network device (50) in a monolithic integrated circuit, electrically erasable and reprogrammable programmable.the device (50) includes a plurality of three types of network ad network, each containing a matrix logic and electrically programmable read only memory transistors configured to form a plurality of product terms "introduced into another matrix (6) (74) formed on the door "or" exit form of expressions are input to the productbuckets.ad is also contained in the single transistor electrically programmable read only memory of that, when combined with other appropriate form sets of circuit control elements, a plurality of storage registers (76 / 90) (scales) of the circuit. s of attack responseinput circuit of attack (56, 57, 58) and outlet channels of attack (108-118), all integrated on the same substrate.the input circuit (56, 57, 58 and attack and attack response channels (108-118) provide input signals to the output from the network and scales (76 / 90) may be directed either to the circuit in response to the attack, attack circuit is the.the control of sources and destinations of data is determined by the control elements which in turn are determined by single transistor electrically programmable read only memory. in this way, it is possible to program the architecture and the function of logic.