Inter-step slow mode control circuit

摘要

A time difference slow mode control circuit of a video tape recorder for controlling a capstan motor by picking up the reproduction control signal from a magnetic tape, in the time difference slow mode, generates delayed phase-delayed pseudo reproduction control signal by a half period of a head switching pulse, the frequency of the pseudo reproduction control signal being the same as that of the reproduction control signal, thus controlling the capstan motor so that the video tape recorder may have a normal time difference slow mode even when a pick-up error arises and thereby improving screen quality.