Data processor capable of executing division of signed data with a small number of program steps

摘要

A data processor using a temporary register for temporarily storing a dividend data and a divisor data, sign flags for indicating respective signs of the dividend and the divisor, and an arithmetic and logic unit (ALU) coupled to the temporary register and having an arithmetic logic operation function required for execution of a division operation and a two's compliment obtaining operation. A microsequencer is provided to control the ALU so as to cause the ALU to execute a given instruction. The microsequencer generates a two's complement obtaining operation instruction signal, and an operation control circuit is coupled to the sign flags and is connected to receive the two's complement obtaining operation instruction signal. The operation control circuit operates to control the ALU in accordance with an output of the sign flags so as to cause the ALU to execute a two's complement obtaining operation, or to substantially invalidate the two's complement obtaining operation of the ALU regardless of the two's complement obtaining operation instruction signal.