SCRAMBLER CIRCUIT AND DESCRAMBLER CIRCUIT AND SCRAMBLE AND DESCRAMBLE PROCESSING METHOD

摘要

PURPOSE:To provide scrambler and descrambler circuits suited also to transmission data which are not framed, which can be processed at a speed slower than a transmission speed. CONSTITUTION:This circuit is equipped with a converting means 1 which converts transmitted serial data into (p) bit parallel data Lkm corresponding to the number (p) of scrambler steps, scramble processing means 3-17 which operates a scramble processing by operating the exclusive OR(EX-OR) of the data Ikm whose bit position is (k)(q) among the data Ikm of each bit position from (k)=0, 1, 2,...(p-1) obtained by the converting means 1, data Dkm-1 to which the scramble processing is previously operated, and D(p-q+k)m-1, and by operating the EX-OR of the data Ikm whose bit position is (k)=(q), data Dkm-1, and data D(-q+k)m, and a converting means 18 which converts the data Dkm of each bit position into serial data.